To improve transistor performance, modern metal-oxide-semiconductor transistors are sometimes formed with strain-inducing epitaxial regions. For example, silicon germanium epitaxial regions can be formed adjacent to the gates in p-channel metal-oxide-semiconductor transistors to create compressive stress in the channels of these transistors. Similarly, silicon carbide epitaxial regions can be formed adjacent to the gates in n-channel metal-oxide-semiconductor transistors to create tensile channel stress. The use of these stress-inducing epitaxial regions enhances carrier mobility and improves transistor performance.
In conventional strained transistor layouts, a regular pattern of gate fingers is formed within a well region. Shallow trench isolation structures form a field oxide that surrounds each well. Near the edges of the shallow trench isolation structures, epitaxial growth may be inhibited, because the presence of the isolation structures tends to starve the epitaxial growth region of silicon. This can lead to incomplete epitaxial regions and inadequate channel stress.